[PATCH] D79705: [TableGen] Fix register class handling in TableGen's DAG ISel Matcher Generator
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 12 10:44:07 PDT 2020
rampitec accepted this revision.
rampitec added a comment.
This revision is now accepted and ready to land.
LGTM
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D79705/new/
https://reviews.llvm.org/D79705
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