[PATCH] D79793: Simplify MachineVerifier's block-successor verification.

[James Y Knight via Phabricator via llvm-commits]

jyknight created this revision.
jyknight added reviewers: nickdesaulniers, void, arsenm, qcolombet, efriedma.
Herald added subscribers: llvm-commits, aheejin, hiraditya, jgravelle-google, sbc100, wdng, dschuff.
Herald added a project: LLVM.
jyknight edited the summary of this revision.
jyknight added a child revision: D79794: Change the INLINEASM_BR MachineInstr to be a non-terminating instruction..

There's two properties we want to verify:

1. That the successors returned by analyzeBranch are in the CFG successor list, and
2. That there are no extraneous successors are in the CFG successor list.

The previous implementation mostly accomplished this, but in a very
convoluted manner.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D79793

Files:
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/test/CodeGen/Hexagon/cext-opt-range-offset.mir
  llvm/test/CodeGen/WebAssembly/eh-labels.mir
  llvm/test/MachineVerifier/verifier-pseudo-terminators.mir

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