[PATCH] D79635: [RISCV] Split the pseudo instruction splitting pass

[Sam Elliott via Phabricator via llvm-commits]

lenary added a comment.

In D79635#2030971 <https://reviews.llvm.org/D79635#2030971>, @jrtc27 wrote:

> Macro-op fusion likely means that we'll always schedule the AUIPC with its consumer anyway, but in theory there could be pipelines that don't macro-op fuse and stall on RAW hazards, which could benefit from splitting the pair up.


I have no idea how common macro-op fusion will be, and it strikes me that the RAW hazards will likely be worse on embedded cores where there is unlikely to be macro-op fusion anyway? This is why I feel it's better to get this pass as early as possible, even if we later schedule these instructions together.

My intention is eventually to get this pass as early in the machine code pipeline as possible. At the moment this is as early as it can go without modifying the `auipc`-introducing code, and some other machine code passes (Branch folding, at the very least).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79635/new/

https://reviews.llvm.org/D79635