[PATCH] D79635: [RISCV] Split the pseudo instruction splitting pass

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVTargetMachine.cpp:171
 
+void RISCVPassConfig::addPreSched2() { addPass(createRISCVExpandPseudoPass()); }
+
----------------
Is this what clang-format enforces? I don't like this style, it makes the diffs needlessly messy when someone adds another pass here.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79635/new/

https://reviews.llvm.org/D79635