[PATCH] D79252: [PowerPC][AIX] Spill CSRs to the ABI specified stack offsets.

[Chris Bowler via Phabricator via llvm-commits]

cebowleratibm added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp:231
+    {PPC::R13, -76},
 
+    // TODO Update when we add vector support for AIX.
----------------
nit: remove blank line.


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Comment at: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp:1836
   // RestoreBlock. So we handle this case here.
   if (MFI.getSavePoint() && MFI.hasTailCall()) {
     MachineBasicBlock *RestoreBlock = MFI.getRestorePoint();
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Since we're enabling this path for AIX is there a LIT test that we should add an AIX variant for to validate this shrink-wrap functionality?


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Comment at: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp:2000
 
-    if (Subtarget.isPPC64()) {
-      LowerBound -= (31 - MinReg + 1) * 8;
-    } else {
-      LowerBound -= (31 - MinReg + 1) * 4;
-    }
+    unsigned GPRegSize = Subtarget.isPPC64() ? 8 : 4;
+    LowerBound -= (31 - MinReg + 1) * GPRegSize;
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const or fold it into the use.  This change is NFC and could be committed independently.


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Comment at: llvm/test/CodeGen/PowerPC/aix-cc-byval-mem.ll:206
 
-; ASM32BIT:       stwu 1, -96(1)
+; ASM32BIT:       stwu 1, -112(1)
 ; ASM32BIT-DAG:   lwz [[REG:[0-9]+]], LC{{[0-9]+}}(2)
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Why do we expect this change to bump the stack adj?  I thought the cc tests don't touch non-volatile regs.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79252/new/

https://reviews.llvm.org/D79252