[PATCH] D78272: [PowerPC] DAG Combine to transform shifts into multiply-high

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:15904
+  SDValue Result = DAG.getNode(MulhOpcode, DL, NarrowVT, LeftOp.getOperand(0),
+                               RightOp.getOperand(0));
+  return (IsSignExt ? DAG.getSExtOrTrunc(Result, DL, WideVT1)
----------------
I don't see a check that RightOp.getOperand(0) and LeftOp.getOperand(0) are the the same type?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78272/new/

https://reviews.llvm.org/D78272