[PATCH] D78829: [AMDGPU] Make SREG_LO16 legal

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:544-547
+    }
+
+    RC = RI.getPhysRegClass(DestReg);
+  }
----------------
rampitec wrote:
> arsenm wrote:
> > rampitec wrote:
> > > arsenm wrote:
> > > > We should make it so that MachineCopyPropagation can deal with this case
> > > Hm... So you want it always? I thought this is a red flag.
> > I mean MCP should eliminate these identity copies. It shouldn't see the src == dest due to 16-bit obscuring this (at least for > -O0)
> Could it? Assume:
> 
> $vgpr1 = $vgpr2_lo16
> %vgpr1 = %vgpr2.lo16
> 
> It does not tell anything about the contents of a high half after the copy. Basically semantics of these is unclear. We can argue a reverse situation is a truncation, but really undefined as well because it would be unrepresentable.
I'm not sure I exactly mean MCP. I'm sort of thinking the allocator would have turned the 16-bit subreg into the same 32-bit reg


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  https://reviews.llvm.org/D78829/new/

https://reviews.llvm.org/D78829