[PATCH] D64193: [PowerPC] Add exception constraint to FP rounding operations

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll:6246
+; PC64LE-NEXT:    addis 4, 2, .LCPI103_1 at toc@ha
 ; PC64LE-NEXT:    addis 3, 2, .LCPI103_0 at toc@ha
+; PC64LE-NEXT:    addi 4, 4, .LCPI103_1 at toc@l
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This looks like a deg. Please explain more about how this happens.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64193/new/

https://reviews.llvm.org/D64193