[PATCH] D78010: [CodeGen] Add new function unionImplicitOps() to union implicit register

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang added inline comments.


================
Comment at: llvm/lib/CodeGen/MachineInstr.cpp:1441
+  for (const MachineOperand &MO : implicit_operands()) {
+    assert(!MO.isRegMask() && "Don't support union for RegMask operand");
+
----------------
The assertion here is not needed. What we really need to care about is the regmask in the MI that we want to union. In fact, it is not hard to handle the case with regmask. I am ok to leave it as limitation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78010/new/

https://reviews.llvm.org/D78010