[PATCH] D77448: [PowerPC] Canonicalize shuffles to match more single-instruction masks on LE

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai updated this revision to Diff 260001.
nemanjai added a comment.

Add handling for shuffles that are fed by SCALAR_TO_VECTOR to avoid the swap before the shuffle.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77448/new/

https://reviews.llvm.org/D77448

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
  llvm/test/CodeGen/PowerPC/build-vector-tests.ll
  llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
  llvm/test/CodeGen/PowerPC/load-and-splat.ll
  llvm/test/CodeGen/PowerPC/load-v4i8-improved.ll
  llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
  llvm/test/CodeGen/PowerPC/pr25080.ll
  llvm/test/CodeGen/PowerPC/pr25157-peephole.ll
  llvm/test/CodeGen/PowerPC/pr38087.ll
  llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
  llvm/test/CodeGen/PowerPC/qpx-load-splat.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_1.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_3.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
  llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
  llvm/test/CodeGen/PowerPC/swaps-le-5.ll
  llvm/test/CodeGen/PowerPC/swaps-le-6.ll
  llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
  llvm/test/CodeGen/PowerPC/vsx.ll
  llvm/test/CodeGen/PowerPC/vsx_insert_extract_le.ll

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