[PATCH] D78568: [DAGCombine] Fix bug in load scalarization

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 23 05:22:02 PDT 2020


foad added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:17241
+  // compute an address to load only the extracted element as a scalar.
+  if (VecEltVT.getSizeInBits() < 8)
+    return SDValue();
----------------
I think using `.isByteSized` would be more obvious and more correct, since it would catch cases like i12 which also can't be handled by indexing.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78568/new/

https://reviews.llvm.org/D78568





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