[PATCH] D78568: [DAGCombine] Fix bug in load scalarization

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck updated this revision to Diff 259520.
frasercrmck added a comment.
Herald added subscribers: kerbowa, nhaehnle, jvesely.

Add a test case


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78568/new/

https://reviews.llvm.org/D78568

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AMDGPU/extract_load_i1.ll


Index: llvm/test/CodeGen/AMDGPU/extract_load_i1.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AMDGPU/extract_load_i1.ll
@@ -0,0 +1,31 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa < %s | FileCheck %s
+
+; FIXME: This could be much better
+; CHECK-LABEL: extractloadi1:
+; CHECK: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CHECK: flat_load_ubyte v0, v[0:1]
+; CHECK: v_and_b32_e32 v1, 7, v2
+; CHECK: v_lshr_b32_e64 v9, s32, 6
+; CHECK: v_or_b32_e32 v1, v9, v1
+; CHECK: s_waitcnt vmcnt(0) lgkmcnt(0)
+; CHECK: v_bfe_u32 v2, v0, 1, 1
+; CHECK: v_bfe_u32 v3, v0, 2, 2
+; CHECK: v_bfe_u32 v4, v0, 3, 1
+; CHECK: v_lshrrev_b32_e32 v5, 4, v0
+; CHECK: v_bfe_u32 v6, v0, 5, 1
+; CHECK: v_lshrrev_b32_e32 v7, 6, v0
+; CHECK: v_lshrrev_b32_e32 v8, 7, v0
+; CHECK: buffer_store_byte v0, off, s[0:3], s32
+; CHECK: buffer_store_byte v8, off, s[0:3], s32 offset:7
+; CHECK: buffer_store_byte v7, off, s[0:3], s32 offset:6
+; CHECK: buffer_store_byte v6, off, s[0:3], s32 offset:5
+; CHECK: buffer_store_byte v5, off, s[0:3], s32 offset:4
+; CHECK: buffer_store_byte v4, off, s[0:3], s32 offset:3
+; CHECK: buffer_store_byte v3, off, s[0:3], s32 offset:2
+; CHECK: buffer_store_byte v2, off, s[0:3], s32 offset:1
+; CHECK: buffer_load_ubyte v0, v1, s[0:3], 0 offen
+define i1 @extractloadi1(<8 x i1> *%ptr, i32 %idx) {
+  %val = load <8 x i1>, <8 x i1> *%ptr
+  %ret = extractelement <8 x i1> %val, i32 %idx
+  ret i1 %ret
+}
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -17235,6 +17235,12 @@
 
   EVT ResultVT = EVE->getValueType(0);
   EVT VecEltVT = InVecVT.getVectorElementType();
+
+  // If the vector element type is narrower than a byte then we are unable to
+  // compute an address to load only the extracted element as a scalar.
+  if (VecEltVT.getSizeInBits() < 8)
+    return SDValue();
+
   unsigned Align = OriginalLoad->getAlignment();
   unsigned NewAlign = DAG.getDataLayout().getABITypeAlignment(
       VecEltVT.getTypeForEVT(*DAG.getContext()));


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