[llvm] 3df8135 - [ARM][MC][Thumb] Recommit: Revert relocation for some pc-relative fixups.

Mark Murray via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 22 08:54:38 PDT 2020


Author: Mark Murray
Date: 2020-04-22T16:54:26+01:00
New Revision: 3df8135286a2180a8fadcdddfcf9d9c232fb6ad7

URL: https://github.com/llvm/llvm-project/commit/3df8135286a2180a8fadcdddfcf9d9c232fb6ad7
DIFF: https://github.com/llvm/llvm-project/commit/3df8135286a2180a8fadcdddfcf9d9c232fb6ad7.diff

LOG: [ARM][MC][Thumb] Recommit: Revert relocation for some pc-relative fixups.

Summary:
This commit recommits the reversion of https://reviews.llvm.org/D75039.

Concensus appears to be in favour of assembly-time resolution of
these ADR and LDR relocations, in line with GNU. The previous
backout broke many lld tests, now fixed by Peter Smith in
61bccda9d9d920c72f49025f11e8601daeb096ec.

Reviewers: psmith

Subscribers: kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78301

Added: 
    

Modified: 
    llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
    llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
    llvm/test/MC/ARM/pcrel-global.s
    llvm/test/MC/ARM/thumb1-relax-adr.s
    llvm/test/MC/ARM/thumb1-relax-ldrlit.s

Removed: 
    llvm/test/MC/ARM/pcrel-global-rel.s


################################################################################
diff  --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 5407bc6f5ffe..6d7fd9f12da9 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -71,8 +71,7 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
       // Name                      Offset (bits) Size (bits)     Flags
       {"fixup_arm_ldst_pcrel_12", 0, 32, IsPCRelConstant},
       {"fixup_t2_ldst_pcrel_12", 0, 32,
-       MCFixupKindInfo::FKF_IsPCRel |
-           MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
+       IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
       {"fixup_arm_pcrel_10_unscaled", 0, 32, IsPCRelConstant},
       {"fixup_arm_pcrel_10", 0, 32, IsPCRelConstant},
       {"fixup_t2_pcrel_10", 0, 32,
@@ -82,12 +81,10 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
       {"fixup_t2_pcrel_9", 0, 32,
        IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
       {"fixup_thumb_adr_pcrel_10", 0, 8,
-       MCFixupKindInfo::FKF_IsPCRel |
-           MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
+       IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
       {"fixup_arm_adr_pcrel_12", 0, 32, IsPCRelConstant},
       {"fixup_t2_adr_pcrel_12", 0, 32,
-       MCFixupKindInfo::FKF_IsPCRel |
-           MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
+       IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
       {"fixup_arm_condbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
       {"fixup_arm_uncondbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
       {"fixup_t2_condbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
@@ -119,7 +116,8 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
       {"fixup_bfc_target", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"fixup_bfcsel_else_target", 0, 32, 0},
       {"fixup_wls", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
-      {"fixup_le", 0, 32, MCFixupKindInfo::FKF_IsPCRel}};
+      {"fixup_le", 0, 32, MCFixupKindInfo::FKF_IsPCRel}
+  };
   const static MCFixupKindInfo InfosBE[ARM::NumTargetFixupKinds] = {
       // This table *must* be in the order that the fixup_* kinds are defined in
       // ARMFixupKinds.h.

diff  --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
index f803671ac976..6bd6addcb6d4 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
@@ -147,13 +147,6 @@ unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
       default:
         return ELF::R_ARM_THM_CALL;
       }
-    case ARM::fixup_thumb_adr_pcrel_10:
-    case ARM::fixup_arm_thumb_cp:
-      return ELF::R_ARM_THM_PC8;
-    case ARM::fixup_t2_adr_pcrel_12:
-      return ELF::R_ARM_THM_ALU_PREL_11_0;
-    case ARM::fixup_t2_ldst_pcrel_12:
-      return ELF::R_ARM_THM_PC12;
     case ARM::fixup_bf_target:
       return ELF::R_ARM_THM_BF16;
     case ARM::fixup_bfc_target:

diff  --git a/llvm/test/MC/ARM/pcrel-global-rel.s b/llvm/test/MC/ARM/pcrel-global-rel.s
deleted file mode 100644
index f1a71e6db773..000000000000
--- a/llvm/test/MC/ARM/pcrel-global-rel.s
+++ /dev/null
@@ -1,18 +0,0 @@
-@ RUN: llvm-mc -filetype=obj -triple=armv7 %s -o %t
-@ RUN: llvm-readobj -r %t
-
-@ Check that for ELF targets we generate a relocation for a within section
-@ pc-relative reference to a global symbol as it may be interposed and we won't
-@ know till link time whether this is possible.
-.thumb
-.thumb_func
-
-.globl bar
-bar:
-adr r0, bar      @ thumb_adr_pcrel_10
-adr.w r0, bar    @ t2_adr_pcrel_12
-ldr.w pc, bar    @ t2_ldst_pcrel_12
-
-@ CHECK:      0x0 R_ARM_THM_ALU_PREL_11_0 bar 0x0
-@ CHECK-NEXT: 0x4 R_ARM_THM_ALU_PREL_11_0 bar 0x0
-@ CHECK-NEXT: 0x8 R_ARM_THM_PC12 bar 0x0

diff  --git a/llvm/test/MC/ARM/pcrel-global.s b/llvm/test/MC/ARM/pcrel-global.s
index c1ab43547532..cec6c1cb52f3 100644
--- a/llvm/test/MC/ARM/pcrel-global.s
+++ b/llvm/test/MC/ARM/pcrel-global.s
@@ -11,3 +11,11 @@ vldr d0, foo     @ arm_pcrel_10
 adr r2, foo      @ arm_adr_pcrel_12
 ldr r0, foo      @ arm_ldst_pcrel_12
 
+.thumb
+.thumb_func
+
+.globl bar
+bar:
+adr r0, bar      @ thumb_adr_pcrel_10
+adr.w r0, bar    @ t2_adr_pcrel_12
+ldr.w pc, bar    @ t2_ldst_pcrel_12

diff  --git a/llvm/test/MC/ARM/thumb1-relax-adr.s b/llvm/test/MC/ARM/thumb1-relax-adr.s
index 213c96822536..3eb2a02ad1f4 100644
--- a/llvm/test/MC/ARM/thumb1-relax-adr.s
+++ b/llvm/test/MC/ARM/thumb1-relax-adr.s
@@ -1,11 +1,8 @@
 @ RUN: not llvm-mc -triple thumbv6m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
 @ RUN: not llvm-mc -triple thumbv7m-none-macho -filetype=obj -o /dev/null %s 2>&1  | FileCheck --check-prefix=CHECK-ERROR %s
-@ RUN: llvm-mc -triple thumbv6m-none-eabi -filetype=obj %s -o - | llvm-readobj --relocs | FileCheck --check-prefix=CHECK-ELF-T1 %s
-@ RUN: llvm-mc -triple thumbv7m-none-eabi -filetype=obj %s -o - | llvm-readobj --relocs | FileCheck --check-prefix=CHECK-ELF-T2 %s
+@ RUN: not llvm-mc -triple thumbv7m-none-eabi -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
 
         .global func1
 _func1:
         adr r0, _func2
 @ CHECK-ERROR: unsupported relocation on symbol
-@ CHECK-ELF-T1: 0x0 R_ARM_THM_PC8 _func2 0x0
-@ CHECK-ELF-T2: 0x0 R_ARM_THM_ALU_PREL_11_0 _func2 0x0

diff  --git a/llvm/test/MC/ARM/thumb1-relax-ldrlit.s b/llvm/test/MC/ARM/thumb1-relax-ldrlit.s
index e65ee52de7cb..f9335842d85d 100644
--- a/llvm/test/MC/ARM/thumb1-relax-ldrlit.s
+++ b/llvm/test/MC/ARM/thumb1-relax-ldrlit.s
@@ -1,11 +1,8 @@
 @ RUN: not llvm-mc -triple thumbv6m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
 @ RUN: not llvm-mc -triple thumbv7m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
-@ RUN: llvm-mc -triple thumbv6m-none-eabi -filetype=obj %s -o - | llvm-readobj --relocs | FileCheck --check-prefix=CHECK-ELF-T1 %s
-@ RUN: llvm-mc -triple thumbv7m-none-eabi -filetype=obj %s -o - | llvm-readobj --relocs | FileCheck --check-prefix=CHECK-ELF-T2 %s
+@ RUN: not llvm-mc -triple thumbv7m-none-eabi -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
 
         .global func1
 _func1:
         ldr r0, _func2
 @ CHECK-ERROR: unsupported relocation on symbol
-@ CHECK-ELF-T1: 0x0 R_ARM_THM_PC8 _func2 0x0
-@ CHECK-ELF-T2: 0x0 R_ARM_THM_PC12 _func2 0x0


        


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