[PATCH] D78364: [MC][Bugfix] Remove redundant parameter for relaxInstruction

[Kan Shengchen via Phabricator via llvm-commits]

skan updated this revision to Diff 258643.
skan marked 6 inline comments as done.
skan added a comment.

Address review comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78364/new/

https://reviews.llvm.org/D78364

Files:
  llvm/include/llvm/MC/MCAsmBackend.h
  llvm/lib/MC/MCAssembler.cpp
  llvm/lib/MC/MCObjectStreamer.cpp
  llvm/lib/MCA/CodeEmitter.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
  llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
  llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
  llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
  llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
  llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
  llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
  llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
  llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
  llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
  llvm/test/MC/RISCV/rv64-relax-all.s

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D78364.258643.patch
Type: text/x-patch
Size: 18264 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200420/81bc7137/attachment.bin>