[PATCH] D78272: [PowerPC] DAG Combine to transform shifts into multiply-high
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 16 01:34:11 PDT 2020
lebedev.ri added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:15918
+ // performed by the type legalizer.
+ if (Subtarget.isPPC64() && DCI.isBeforeLegalize())
+ if (SDValue MULH = combineShifttoMULH(N, DCI.DAG, *this, Subtarget))
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This doesn't look like the best check for this.
Do we not want this transform in general, is it expected to be pessimizing somewhere?
Then i'd expect it to be a TLI hook.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78272/new/
https://reviews.llvm.org/D78272
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