[PATCH] D78203: [VP,Integer,#2] ExpandVectorPredication pass

[Simon Moll via Phabricator via llvm-commits]

simoll created this revision.
simoll added reviewers: rkruppe, mkuper, fhahn, huntergr, sdesmalen, jdoerfert, andrew.w.kaylor, arsenm, reames, rengolin.
simoll added a project: VP.
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simoll added a comment.
simoll added a parent revision: D57504: RFC: Prototype & Roadmap for vector predication in LLVM.

Since this is bound to come up: Yes, there is no expansion for scalable types yet because i could not find a target-agnostic way to generate a step vector. I only found this seemingly abandoned patch: https://reviews.llvm.org/D47774. Any suggestion for a (portable) evl-to-mask lowering or patches for stepvector are appreciated.


This patch implements expansion of llvm.vp.* intrinsics (https://llvm.org/docs/LangRef.html#vector-predication-intrinsics).
This is a **work in progress** and not to be committed as-is or in one commit. Early feedback is very welcome.

VP expansion is required for targets that do not implement VP code generation. Since expansion is controllable with TTI, targets can "switch on" the VP intrinsics they do support in their backend offering a smooth transition strategy for VP code generation (VE, RISC-V V, ARM SVE, AVX512, ..).

ExpandVectorPredication
-----------------------

The `ExpandVectorPredication` pass that folds the EVL parameter into the vector mask and/or lowers a VP intrinsics to a standard IR instruction.

Why PredicatedInstruction?
--------------------------

This class provides a view on the IR where VP intrinsics appear as regular instructions. (eg a `llvm.vp.add` intrinsics will appear as an `add` instructions with a mask and an EVL, and a regular `add` instruction is an `add` without mask or EVL).

For the `why?`: The alternative here is a `VPIntrinsic` or `IntrinsicInst`. However, our goal is native vector-predication in LLVM IR. The `PredicatedInstruction` class abstracts away from how vector-predication is implemented (whether it is an intrinsic or an instruction extension) and so we can switch representations without compromising users of vector predication.

Those "users of vector predication" in the IR are:

- TTI (already in this patch) - to query how vector-predicated instructions should be expanded/lowered.
- Future optimizations for vector-predicated code (eg, see the generalized pattern matching for InstCombine/Simplify in the reference patch) <https://reviews.llvm.org/D57504>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D78203

Files:
  llvm/include/llvm/Analysis/TargetTransformInfo.h
  llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
  llvm/include/llvm/CodeGen/ExpandVectorPredication.h
  llvm/include/llvm/CodeGen/Passes.h
  llvm/include/llvm/IR/IntrinsicInst.h
  llvm/include/llvm/IR/PredicatedInst.h
  llvm/include/llvm/InitializePasses.h
  llvm/lib/Analysis/TargetTransformInfo.cpp
  llvm/lib/CodeGen/CMakeLists.txt
  llvm/lib/CodeGen/ExpandVectorPredication.cpp
  llvm/lib/CodeGen/TargetPassConfig.cpp
  llvm/lib/IR/CMakeLists.txt
  llvm/lib/IR/IntrinsicInst.cpp
  llvm/lib/IR/PredicatedInst.cpp
  llvm/test/CodeGen/AArch64/O0-pipeline.ll
  llvm/test/CodeGen/AArch64/O3-pipeline.ll
  llvm/test/CodeGen/ARM/O3-pipeline.ll
  llvm/test/CodeGen/Generic/expand-vp.ll
  llvm/test/CodeGen/X86/O0-pipeline.ll
  llvm/test/CodeGen/X86/O3-pipeline.ll
  llvm/tools/llc/llc.cpp
  llvm/tools/opt/opt.cpp

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