[PATCH] D77387: [ARM] Fix conditions for lowering to S[LR]I

[Petre Tudor via Phabricator via llvm-commits]

PetreTudor updated this revision to Diff 257679.
PetreTudor added a comment.

Simplified logic for converting intrinsics to AArch64ISD::VS[LR]I.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77387/new/

https://reviews.llvm.org/D77387

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/arm64-sli-sri-opt.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D77387.257679.patch
Type: text/x-patch
Size: 9907 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200415/d687dabe/attachment.bin>