[PATCH] D78137: [RegBankSelect] Hide assertion failure from LLT::getScalarSizeInBits

Daniel Sanders via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 14 16:52:40 PDT 2020


dsanders added a comment.

> (lldb) p MF.dump()
> 
> 1. Machine code for function phiPropagation: IsSSA, TracksLiveness, Legalized
> 
>   bb.0.entry: successors: %bb.2(0x40000000), %bb.1(0x40000000); %bb.2(50.00%), %bb.1(50.00%) liveins: $x0, $x1, $w2 %0:gpr32 = LDRWui killed $x0, 0, debug-location !23 :: (load 4 from %ir.src); /Users/vsk/src/llvm-project-master/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir:6:1 DBG_VALUE %0:gpr32, $noreg, !"1", !DIExpression(), debug-location !23; /Users/vsk/src/llvm-project-master/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir:6:1 line no:6 ```

If you moved the DBG_VALUE below the `%5(s32) = COPY %0` does it still assert? It's interesting that the target instruction means the DBG_VALUE is the first to be processed in that def/use chain but I suspect the real problem is that it's not deriving the register bank from the register class and the special case for COPY deals with that.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78137/new/

https://reviews.llvm.org/D78137





More information about the llvm-commits mailing list