[PATCH] D78137: [RegBankSelect] Hide assertion failure from LLT::getScalarSizeInBits

[Daniel Sanders via Phabricator via llvm-commits]

dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.

Thanks for fixing this. LGTM

> This eventually leads to an assert
>  in AArch64RegisterBankInfo::getInstrMapping because there is some info
>  missing from the DBG_VALUE MachineOperand (I see: `Assertion failed:
>  (RawData != 0 && "Invalid Type"), function getScalarSizeInBits`).

Yes, most instructions get their constraints from the tablegen definitions. COPY is special as it gets it from whichever operand has already had a bank chosen. DBG_VALUE is also special as it genuinely doesn't have a constraint. It's happy to just go along with whatever the rest of the def/use chain decides.

I'm not sure why we haven't run into this before. Maybe the processing order just works out such that for real debug info we've already chosen a reg bank before we look at the DBG_VALUE's


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https://reviews.llvm.org/D78137