[PATCH] D77687: [SelectionDAG] Fix usage of Align constructing MachineMemOperands
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 12 15:29:38 PDT 2020
efriedma updated this revision to Diff 256886.
efriedma edited the summary of this revision.
efriedma added a comment.
Herald added subscribers: kerbowa, nhaehnle, jvesely.
Herald added a reviewer: ctetreau.
Rebased, fixed test failures, updated commit message.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77687/new/
https://reviews.llvm.org/D77687
Files:
llvm/include/llvm/CodeGen/MachineMemOperand.h
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
llvm/test/CodeGen/RISCV/vararg.ll
llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
llvm/test/CodeGen/X86/avx512-insert-extract.ll
llvm/test/CodeGen/X86/nosse-vector.ll
llvm/test/CodeGen/X86/sadd_sat_vec.ll
llvm/test/CodeGen/X86/ssub_sat_vec.ll
llvm/test/CodeGen/X86/uadd_sat_vec.ll
llvm/test/CodeGen/X86/usub_sat_vec.ll
llvm/test/CodeGen/X86/widen_cast-2.ll
llvm/test/CodeGen/X86/widen_load-2.ll
llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
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