[PATCH] D77687: [SelectionDAG] Fix usage of Align constructing MachineMemOperands

[Eli Friedman via Phabricator via llvm-commits]

efriedma created this revision.
efriedma added reviewers: craig.topper, RKSimon.
Herald added subscribers: luismarques, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, nemanjai.
Herald added a project: LLVM.

The "Align" passed into getMachineMemOperand etc. is the alignment of the MachinePointerInfo, not the alignment of the memory operation. (getAlign() on a MachineMemOperand automatically reduces the alignment to account for this.)  So fix two issues here:

1. We were passing on wrong (overconservative) alignment in a bunch of places. Fix a bunch of these, mostly in legalization.  And while I'm here, switch to the new Align APIs.
2. There was a bug in MachinePointerInfo where getWithOffset() would drop the offset if the base was null. So we would end up computing the alignment incorrectly in the rare cases where we don't have a real MachinePointerInfo.

The test changes are all scheduling changes: the biggest effect of preserving large alignments is that it improves alias analysis, so the scheduler has more freedom.

(I was originally just trying to do a minor cleanup in SelectionDAGBuilder, but I accidentally went deeper down the rabbit hole.)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77687

Files:
  llvm/include/llvm/CodeGen/MachineMemOperand.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
  llvm/test/CodeGen/RISCV/vararg.ll
  llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
  llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
  llvm/test/CodeGen/X86/avx512-insert-extract.ll
  llvm/test/CodeGen/X86/nosse-vector.ll
  llvm/test/CodeGen/X86/sadd_sat_vec.ll
  llvm/test/CodeGen/X86/ssub_sat_vec.ll
  llvm/test/CodeGen/X86/uadd_sat_vec.ll
  llvm/test/CodeGen/X86/usub_sat_vec.ll
  llvm/test/CodeGen/X86/widen_cast-2.ll
  llvm/test/CodeGen/X86/widen_load-2.ll

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