[PATCH] D77895: [x86] use vector instructions to lower FP->int->FP casts

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

In D77895#1975100 <https://reviews.llvm.org/D77895#1975100>, @pcordes wrote:

> While we're looking at this, could we use `[v]roundss $11, src, src, dst` when available for no-fast-math?
>
> float->int overflow is UB so ISO C allows us to assume it doesn't happen.  Unless we want to go beyond that, we don't need to preserve the behaviour of producing `0x80000000` as an integer result from the overflowing `(int)` cast and then converting that back to a float that represents that negative value, for out-of-range inputs.  But if this optimization stage happens late enough on IR that does expect those semantics, that's different.  But behaviour for similar asm instructions on other ISAs might not give the same bit-pattern so I'm not sure how useful this is.  e.g. ARM conversions saturate to the bounds of the int value-range.


The problem is -0.0 rather than overflow. (The non-obvious "#0" attribute on some of the tests is for "no-signed-zeros-fp-math"="true"; I should change the test name to make it clearer.)
We used to produce roundss more aggressively, but we had to back that out because it's wrong:
D48085 <https://reviews.llvm.org/D48085>
We also added a bailout flag for the transform because there's too much code in the wild that relied on some particular UB overflow behavior.


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