[PATCH] D77422: [llvm-exegesis] Add benchmark mode that uses LBR for more precise measurements.

[Ondrej Sykora via Phabricator via llvm-commits]

ondrasej added inline comments.


================
Comment at: llvm/docs/CommandGuide/llvm-exegesis.rst:199
+   `latency[LBR]` is only available on X86 (at least `Haswell`, but preferably
+   `Skylake` for more precise measurements). To run in this mode, a positive value
+   must be specified for `x86-lbr-sample-period`
----------------
The LBR on Haswell has only the addresses of the branches. To get the timing, Skylake is the minimal requirement.


================
Comment at: llvm/docs/CommandGuide/llvm-exegesis.rst:207
+
+  Specify the sampling period - how many branches before we take a sample.
+  On choosing the "right" sampling period, a small value is preferred, but throttling
----------------
I'd add a mention that this applies to the LBR ratency mode.


================
Comment at: llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp:186
+bool supportsLbr(const LLVMState &State) {
+  static const std::set<std::string> SupportedCpus{"haswell", "broadwell",
+                                                   "skylake", "kabylake"};
----------------
As noted above - Haswell and Broadwell have the LBR, but it does not report the number of cycles between the branches.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D77422/new/

https://reviews.llvm.org/D77422