[llvm] 7a46e36 - CodeGen: Use Register more in CallLowering

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-04-08T12:10:58-04:00
New Revision: 7a46e36d518868fd77518c9e0dc13786ffb969c5

URL: https://github.com/llvm/llvm-project/commit/7a46e36d518868fd77518c9e0dc13786ffb969c5
DIFF: https://github.com/llvm/llvm-project/commit/7a46e36d518868fd77518c9e0dc13786ffb969c5.diff

LOG: CodeGen: Use Register more in CallLowering

Some of these MCPhysReg uses should probably be MCRegister, but right
now this would require more invasive changes.

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/CallingConvLower.h
    llvm/lib/CodeGen/CallingConvLower.cpp

Removed: 
    


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diff  --git a/llvm/include/llvm/CodeGen/CallingConvLower.h b/llvm/include/llvm/CodeGen/CallingConvLower.h
index c4ecd843bd0b..cdba36605836 100644
--- a/llvm/include/llvm/CodeGen/CallingConvLower.h
+++ b/llvm/include/llvm/CodeGen/CallingConvLower.h
@@ -165,9 +165,9 @@ class CCValAssign {
 /// Describes a register that needs to be forwarded from the prologue to a
 /// musttail call.
 struct ForwardedRegister {
-  ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT)
+  ForwardedRegister(Register VReg, MCPhysReg PReg, MVT VT)
       : VReg(VReg), PReg(PReg), VT(VT) {}
-  unsigned VReg;
+  Register VReg;
   MCPhysReg PReg;
   MVT VT;
 };
@@ -282,8 +282,8 @@ class CCState {
 
   /// isAllocated - Return true if the specified register (or an alias) is
   /// allocated.
-  bool isAllocated(unsigned Reg) const {
-    return UsedRegs[Reg/32] & (1 << (Reg&31));
+  bool isAllocated(MCRegister Reg) const {
+    return UsedRegs[Reg / 32] & (1 << (Reg & 31));
   }
 
   /// AnalyzeFormalArguments - Analyze an array of argument values,
@@ -333,7 +333,7 @@ class CCState {
   /// A shadow allocated register is a register that was allocated
   /// but wasn't added to the location list (Locs).
   /// \returns true if the register was allocated as shadow or false otherwise.
-  bool IsShadowAllocatedReg(unsigned Reg) const;
+  bool IsShadowAllocatedReg(MCRegister Reg) const;
 
   /// AnalyzeCallResult - Same as above except it's specialized for calls which
   /// produce a single value.
@@ -351,15 +351,17 @@ class CCState {
   /// AllocateReg - Attempt to allocate one register.  If it is not available,
   /// return zero.  Otherwise, return the register, marking it and any aliases
   /// as allocated.
-  unsigned AllocateReg(unsigned Reg) {
-    if (isAllocated(Reg)) return 0;
+  MCRegister AllocateReg(MCPhysReg Reg) {
+    if (isAllocated(Reg))
+      return MCRegister();
     MarkAllocated(Reg);
     return Reg;
   }
 
   /// Version of AllocateReg with extra register to be shadowed.
-  unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
-    if (isAllocated(Reg)) return 0;
+  MCRegister AllocateReg(MCPhysReg Reg, MCPhysReg ShadowReg) {
+    if (isAllocated(Reg))
+      return MCRegister();
     MarkAllocated(Reg);
     MarkAllocated(ShadowReg);
     return Reg;
@@ -368,13 +370,13 @@ class CCState {
   /// AllocateReg - Attempt to allocate one of the specified registers.  If none
   /// are available, return zero.  Otherwise, return the first one available,
   /// marking it and any aliases as allocated.
-  unsigned AllocateReg(ArrayRef<MCPhysReg> Regs) {
+  MCPhysReg AllocateReg(ArrayRef<MCPhysReg> Regs) {
     unsigned FirstUnalloc = getFirstUnallocated(Regs);
     if (FirstUnalloc == Regs.size())
-      return 0;    // Didn't find the reg.
+      return MCRegister();    // Didn't find the reg.
 
     // Mark the register and any aliases as allocated.
-    unsigned Reg = Regs[FirstUnalloc];
+    MCPhysReg Reg = Regs[FirstUnalloc];
     MarkAllocated(Reg);
     return Reg;
   }
@@ -382,7 +384,7 @@ class CCState {
   /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
   /// registers. If this is not possible, return zero. Otherwise, return the first
   /// register of the block that were allocated, marking the entire block as allocated.
-  unsigned AllocateRegBlock(ArrayRef<MCPhysReg> Regs, unsigned RegsRequired) {
+  MCPhysReg AllocateRegBlock(ArrayRef<MCPhysReg> Regs, unsigned RegsRequired) {
     if (RegsRequired > Regs.size())
       return 0;
 
@@ -409,13 +411,13 @@ class CCState {
   }
 
   /// Version of AllocateReg with list of registers to be shadowed.
-  unsigned AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) {
+  MCRegister AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) {
     unsigned FirstUnalloc = getFirstUnallocated(Regs);
     if (FirstUnalloc == Regs.size())
-      return 0;    // Didn't find the reg.
+      return MCRegister();    // Didn't find the reg.
 
     // Mark the register and any aliases as allocated.
-    unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
+    MCRegister Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
     MarkAllocated(Reg);
     MarkAllocated(ShadowReg);
     return Reg;
@@ -569,7 +571,7 @@ class CCState {
 
 private:
   /// MarkAllocated - Mark a register and all of its aliases as allocated.
-  void MarkAllocated(unsigned Reg);
+  void MarkAllocated(MCPhysReg Reg);
 };
 
 } // end namespace llvm

diff  --git a/llvm/lib/CodeGen/CallingConvLower.cpp b/llvm/lib/CodeGen/CallingConvLower.cpp
index 4078ece31935..12c4f1b6a219 100644
--- a/llvm/lib/CodeGen/CallingConvLower.cpp
+++ b/llvm/lib/CodeGen/CallingConvLower.cpp
@@ -59,12 +59,12 @@ void CCState::HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
 }
 
 /// Mark a register and all of its aliases as allocated.
-void CCState::MarkAllocated(unsigned Reg) {
+void CCState::MarkAllocated(MCPhysReg Reg) {
   for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
-    UsedRegs[*AI/32] |= 1 << (*AI&31);
+    UsedRegs[*AI / 32] |= 1 << (*AI & 31);
 }
 
-bool CCState::IsShadowAllocatedReg(unsigned Reg) const {
+bool CCState::IsShadowAllocatedReg(MCRegister Reg) const {
   if (!isAllocated(Reg))
     return false;