[PATCH] D77201: [CodeGen][SelectionDAG] Flip Booleans More Often

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh abandoned this revision.
Pierre-vh added a comment.

Hello again,

I found the source of the issue. It was a AVX512 thing in the X86 Backend.
There is a transformation in X86ISelLowering.cpp, around line 39476, that transforms a `vselect cond, a, b` into `vselect !cond, b, a` in _some_ situations.
It caused an infinite loop with this change: the X86 Combiner was making the change, the DAGCombiner was reverting it, and so on.

I'm going to abandon this revision in favor of a ARMISelLowering.cpp patch that implements a similar transform for ARM/MVE only. It'll be much safer.

Thanks again for all the help, and sorry for the trouble!


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