[PATCH] D77201: [CodeGen][SelectionDAG] Flip Booleans More Often

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added a comment.

In D77201#1966568 <https://reviews.llvm.org/D77201#1966568>, @thakis wrote:

> > I had to revert this change because it seemed to have caused multiple buildbot failures:
>
> This seems to repro locally when running check-llvm. llc hangs in an infinite loop for e.g. llvm/test/CodeGen/X86/avx512-vec-cmp.ll


Exactly, `llvm/test/CodeGen/X86/avx512-select.ll` also causes an infinite loop in `pr31515` with this run line:
`; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=X64,X64-AVX512BW`

I've found that the DAGCombiner is transforming a `VSELECT Cond, A, B`  into something close to `VSELECT !Cond, B, A` in some specific conditions and it just goes into an infinite loop (due to this change), swapping the condition over and over again, creating nodes endlessly.
I'm working on it, I'll try to find a fix and update this patch when I have a fix, or if I get stuck.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D77201/new/

https://reviews.llvm.org/D77201