[PATCH] D77300: [X86] Improve combineVectorShiftImm
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 2 08:06:28 PDT 2020
foad marked an inline comment as done.
foad added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:40883
+ (!LogicalShift && ISD::isBuildVectorAllOnes(N0.getNode())))
return N0;
----------------
RKSimon wrote:
> ISD::isBuildVectorAll* leaves UNDEFs in there - we must generate the constant
I don't quite understand why. If there are undefs in there then we will effectively be folding (VSRAI undef, C) -> undef (for some lanes). Isn't that allowed?
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https://reviews.llvm.org/D77300/new/
https://reviews.llvm.org/D77300
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