[PATCH] D77300: [X86] Improve combineVectorShiftImm

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:40883
+      (!LogicalShift && ISD::isBuildVectorAllOnes(N0.getNode())))
     return N0;
 
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ISD::isBuildVectorAll* leaves UNDEFs in there - we must generate the constant


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77300/new/

https://reviews.llvm.org/D77300