[llvm] 4eeb56d - [PowerPC] Don't do the folding if the operand is R0/X0

[QingShan Zhang via llvm-commits]

Author: QingShan Zhang
Date: 2020-03-31T02:50:19Z
New Revision: 4eeb56d08874e1abe46d7f6d1dd492e717b93a35

URL: https://github.com/llvm/llvm-project/commit/4eeb56d08874e1abe46d7f6d1dd492e717b93a35
DIFF: https://github.com/llvm/llvm-project/commit/4eeb56d08874e1abe46d7f6d1dd492e717b93a35.diff

LOG: [PowerPC] Don't do the folding if the operand is R0/X0

We have this transformation in PowerPC peephole:

Replace instruction:
  renamable $x28 = ADDI8 renamable $x7, -8
  renamable $x28 = ADD8 killed renamable $x28, renamable $x0
  STFD killed renamable $f0, -8, killed renamable $x28 :: (store 8 into %ir._ind_cast99.epil)
with:
  renamable $x28 = ADDI8 renamable $x7, -16
  STFDX killed renamable $f0, $x0, killed $x28 :: (store 8 into %ir._ind_cast99.epil)

It is invalid as the '$x0' in STFDX is constant 0, not register r0.

Reviewed By: Nemanjai

Differential Revision: https://reviews.llvm.org/D77034

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
    llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index f7a68dd16229..f56df563ad5f 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -2597,6 +2597,13 @@ bool PPCInstrInfo::foldFrameOffset(MachineInstr &MI) const {
         return true;
     return false;
   };
+
+  // We are trying to replace the ImmOpNo with ScaleReg. Give up if it is
+  // treated as special zero when ScaleReg is R0/X0 register.
+  if (III.ZeroIsSpecialOrig == III.ImmOpNo &&
+      (ScaleReg == PPC::R0 || ScaleReg == PPC::X0))
+    return false;
+
   // Make sure no other def for ToBeChangedReg and ScaleReg between ADD Instr
   // and Imm Instr.
   if (NewDefFor(ToBeChangedReg, *ADDMI, MI) || NewDefFor(ScaleReg, *ADDMI, MI))

diff  --git a/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir b/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir
index b8b9660e3e14..810612340a51 100644
--- a/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir
+++ b/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir
@@ -152,3 +152,16 @@ body: |
     ; CHECK: $x6 = LD 4, killed $x4
     BLR8 implicit $lr8, implicit $rm
 ...
+---
+name: testR0
+# Give up the folding if the register is R0/X0
+tracksRegLiveness: true
+body:             |
+  bb.0.entry:
+    liveins: $f1, $x0, $x3
+    $x4 = ADDI8 killed $x3, -8
+    $x4 = ADD8 killed $x4, $x0
+    STFD killed $f1, -8, killed $x4
+    ; CHECK-NOT: STFDX
+    BLR8 implicit $lr8, implicit $rm
+...