[PATCH] D74315: AMDGPU/GlobalISel: Start handling _L to _LZ optimization
Nicolai Hähnle via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 30 09:11:03 PDT 2020
nhaehnle added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:3560-3564
+ // FIXME: This isn't the cleanest way to handle this, but it's the easiest
+ // option the current infrastructure gives. We really should be changing the
+ // base intrinsic opcode, but the current searchable tables only gives us
+ // the final MI opcode. Eliminate the register here, and track with an
+ // immediate 0 so the final selection will know to do the opcode change.
----------------
arsenm wrote:
> nhaehnle wrote:
> > This no longer applies, does it? MIMGLZMappingTable contains L and LZ fields of type MIMGBaseOpcode now.
> This is still in terms of the machine opcode, not the intrinsic ID
How about doing a reverse lookup with a second index like
```
def getImageDimInstrinsicByBaseOpcode : SearchIndex {
let Table = ImageDimIntrinsicTable;
let Key = ["BaseOpcode", "Dim"];
}
```
which should auto-generate a C++ function with signature:
```
const ImageDimIntrinsicInfo *getImageDimIntrinsicByBaseOpcode(unsigned BaseOpcode, MIMGDim Dim);
```
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74315/new/
https://reviews.llvm.org/D74315
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