[PATCH] D76875: [NFC] [PPC] [AIX] Test improvements for byval arguments that fit in a single register

[Chris Bowler via Phabricator via llvm-commits]

cebowleratibm marked an inline comment as done.
cebowleratibm added inline comments.


================
Comment at: llvm/test/CodeGen/PowerPC/aix-cc-byval.ll:125
+; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
+; 32BIT-DAG:   ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+; 32BIT-DAG:   $r3 = LI 42
----------------
sfertile wrote:
> The AdjustCallStackDown nodes should be a 'CHECK' as opposed to a 'CHECK-DAG'.
The actual output is:

```
    renamable $r3 = LWZtoc @f, $r2 :: (load 4 from got)
    renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load 4 from @f)
    ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
    renamable $r3 = LWZtoc @gS2, $r2 :: (load 4 from got)
    renamable $r3 = LHZ 0, killed renamable $r3 :: (load 2)
    renamable $r5 = RLWINM killed renamable $r3, 16, 0, 15
    $r3 = LI 42
    $f2 = COPY renamable $f1
    $r7 = LI 43
    BL_NOP <mcsymbol .test_byval_2Byte>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r5, implicit killed $f2, implicit killed $r7, implicit $r2, implicit-def $r1, implicit-def dead $r3
    ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
```
I used the CHECK-DAG to keep it in the logical order, however, now I'm thinking we're missing some dependency information in the DAG during the call lowering.


Repository:
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https://reviews.llvm.org/D76875