[PATCH] D75833: [RISCV] Support RISC-V ELF attribute section in llvm-readobj

Hsiangkai Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 26 03:12:54 PDT 2020


HsiangKai marked an inline comment as done.
HsiangKai added inline comments.


================
Comment at: llvm/test/tools/llvm-readobj/ELF/RISCV/invalid-attr-section-size.test:18
+## Version: 'A'(0x41), section size: 0
+    Content: 4100000000
----------------
jhenderson wrote:
> Is the size 32-bits even for ELF64?
Yes, it is a 4-byte unsigned integer according to https://developer.arm.com/docs/ihi0044/h/elf-for-the-arm-architecture-abi-2019q1-documentation.


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https://reviews.llvm.org/D75833





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