[llvm] f09b891 - [SystemZ] Improve foldMemoryOperandImpl()
Jonas Paulsson via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 25 08:29:13 PDT 2020
Author: Jonas Paulsson
Date: 2020-03-25T16:21:08+01:00
New Revision: f09b891d4a3f1446f561f3287705fe29ddfe1432
URL: https://github.com/llvm/llvm-project/commit/f09b891d4a3f1446f561f3287705fe29ddfe1432
DIFF: https://github.com/llvm/llvm-project/commit/f09b891d4a3f1446f561f3287705fe29ddfe1432.diff
LOG: [SystemZ] Improve foldMemoryOperandImpl()
A spilled load of an immediate can use MVHI/MVGHI instead.
A compare of a spilled register against an immediate can use CHSI/CGHSI.
A logical compare can use CLFHSI/CLGHSI.
Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D76055
Added:
llvm/test/CodeGen/SystemZ/foldmemop-imm-01.ll
llvm/test/CodeGen/SystemZ/foldmemop-imm-02.mir
Modified:
llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
index ee347ce65a6b..b713f4498a9d 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
@@ -1078,6 +1078,32 @@ MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
return BuiltMI;
}
+ unsigned MemImmOpc = 0;
+ switch (Opcode) {
+ case SystemZ::LHIMux:
+ case SystemZ::LHI: MemImmOpc = SystemZ::MVHI; break;
+ case SystemZ::LGHI: MemImmOpc = SystemZ::MVGHI; break;
+ case SystemZ::CHIMux:
+ case SystemZ::CHI: MemImmOpc = SystemZ::CHSI; break;
+ case SystemZ::CGHI: MemImmOpc = SystemZ::CGHSI; break;
+ case SystemZ::CLFIMux:
+ case SystemZ::CLFI:
+ if (isUInt<16>(MI.getOperand(1).getImm()))
+ MemImmOpc = SystemZ::CLFHSI;
+ break;
+ case SystemZ::CLGFI:
+ if (isUInt<16>(MI.getOperand(1).getImm()))
+ MemImmOpc = SystemZ::CLGHSI;
+ break;
+ default: break;
+ }
+ if (MemImmOpc)
+ return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
+ get(MemImmOpc))
+ .addFrameIndex(FrameIndex)
+ .addImm(0)
+ .addImm(MI.getOperand(1).getImm());
+
if (Opcode == SystemZ::LGDR || Opcode == SystemZ::LDGR) {
bool Op0IsGPR = (Opcode == SystemZ::LGDR);
bool Op1IsGPR = (Opcode == SystemZ::LDGR);
diff --git a/llvm/test/CodeGen/SystemZ/foldmemop-imm-01.ll b/llvm/test/CodeGen/SystemZ/foldmemop-imm-01.ll
new file mode 100644
index 000000000000..08a32a39519b
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/foldmemop-imm-01.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O3 -mcpu=z10 | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O3 -mcpu=z14 | FileCheck %s
+;
+; Test folding of spilled immediate loads and compares.
+
+define i32 @fun0(i32 *%src, i32 %arg) nounwind {
+; CHECK-LABEL: fun0:
+; CHECK: mvhi 164(%r15), 0 # 4-byte Folded Spill
+; CHECK: mvc 164(4,%r15), 0(%r2) # 4-byte Folded Spill
+; CHECK-LABEL: .LBB0_2:
+; CHECK: chsi 164(%r15), 2 # 4-byte Folded Reload
+
+entry:
+ %cmp = icmp eq i32 %arg, 0
+ br i1 %cmp, label %cond, label %exit
+
+cond:
+ %val0 = load i32, i32 *%src
+ call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
+ br label %exit
+
+exit:
+ %tmp0 = phi i32 [0, %entry], [%val0, %cond]
+ call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
+ %cmp0 = icmp ne i32 %tmp0, 2
+ %zxt0 = zext i1 %cmp0 to i32
+ %and0 = and i32 %arg, %zxt0
+
+ ret i32 %and0
+}
+
+define i64 @fun1(i64 *%src, i64 %arg) nounwind {
+; CHECK-LABEL: fun1:
+; CHECK: mvghi 168(%r15), 0 # 8-byte Folded Spill
+; CHECK: mvc 168(8,%r15), 0(%r2) # 8-byte Folded Spill
+; CHECK-LABEL: .LBB1_2:
+; CHECK: cghsi 168(%r15), 2 # 8-byte Folded Reload
+entry:
+ %cmp = icmp eq i64 %arg, 0
+ br i1 %cmp, label %cond, label %exit
+
+cond:
+ %val0 = load i64, i64 *%src
+ call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
+ br label %exit
+
+exit:
+ %tmp0 = phi i64 [0, %entry], [%val0, %cond]
+ call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
+ %cmp0 = icmp ne i64 %tmp0, 2
+ %zxt0 = zext i1 %cmp0 to i64
+ %and0 = and i64 %arg, %zxt0
+
+ ret i64 %and0
+}
diff --git a/llvm/test/CodeGen/SystemZ/foldmemop-imm-02.mir b/llvm/test/CodeGen/SystemZ/foldmemop-imm-02.mir
new file mode 100644
index 000000000000..bf3347eb5c45
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/foldmemop-imm-02.mir
@@ -0,0 +1,233 @@
+# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z14 -start-before=greedy %s -o - \
+# RUN: | FileCheck %s
+#
+# Test folding of a memory operand into logical compare with an immediate.
+
+--- |
+ define i32 @fun0(i32* %src, i32 %arg) { ret i32 0 }
+ define i64 @fun1(i64* %src, i64 %arg) { ret i64 0 }
+ define i32 @fun2(i32* %src, i32 %arg) { ret i32 0 }
+ define i64 @fun3(i64* %src, i64 %arg) { ret i64 0 }
+...
+
+
+# CHECK-LABEL: fun0:
+# CHECK: mvhi 164(%r15), 0 # 4-byte Folded Spill
+# CHECK: mvc 164(4,%r15), 0(%r2) # 4-byte Folded Spill
+# CHECK-LABEL: .LBB0_2:
+# CHECK: clfhsi 164(%r15), 2 # 4-byte Folded Reload
+---
+name: fun0
+alignment: 16
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: grx32bit }
+ - { id: 1, class: grx32bit }
+ - { id: 2, class: addr64bit }
+ - { id: 3, class: gr32bit }
+ - { id: 4, class: grx32bit }
+ - { id: 5, class: grx32bit }
+ - { id: 6, class: gr32bit }
+ - { id: 7, class: gr32bit }
+ - { id: 8, class: grx32bit }
+liveins:
+ - { reg: '$r2d', virtual-reg: '%2' }
+ - { reg: '$r3l', virtual-reg: '%3' }
+frameInfo:
+ maxAlignment: 1
+ hasOpaqueSPAdjustment: true
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ successors: %bb.1(0x30000000), %bb.2(0x50000000)
+ liveins: $r2d, $r3l
+
+ %3:gr32bit = COPY $r3l
+ %2:addr64bit = COPY $r2d
+ %6:gr32bit = LHIMux 0
+ CHIMux %3, 0, implicit-def $cc
+ %8:grx32bit = LHIMux 0
+ BRC 14, 6, %bb.2, implicit killed $cc
+ J %bb.1
+
+ bb.1:
+ %8:grx32bit = LMux %2, 0, $noreg :: (load 4 from %ir.src)
+ INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
+
+ bb.2:
+ INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
+ CLFIMux %8, 2, implicit-def $cc
+ %6:gr32bit = LOCHIMux %6, 1, 14, 6, implicit killed $cc
+ %7:gr32bit = NRK %3, %6, implicit-def dead $cc
+ $r2l = COPY %7
+ Return implicit $r2l
+
+...
+
+
+# CHECK-LABEL: fun1:
+# CHECK: mvghi 168(%r15), 0 # 8-byte Folded Spill
+# CHECK: mvc 168(8,%r15), 0(%r2) # 8-byte Folded Spill
+# CHECK-LABEL: .LBB1_2:
+# CHECK: clghsi 168(%r15), 2 # 8-byte Folded Reload
+---
+name: fun1
+alignment: 16
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gr64bit }
+ - { id: 1, class: gr64bit }
+ - { id: 2, class: addr64bit }
+ - { id: 3, class: gr64bit }
+ - { id: 4, class: gr64bit }
+ - { id: 5, class: gr64bit }
+ - { id: 6, class: gr64bit }
+ - { id: 7, class: gr64bit }
+ - { id: 8, class: gr64bit }
+liveins:
+ - { reg: '$r2d', virtual-reg: '%2' }
+ - { reg: '$r3d', virtual-reg: '%3' }
+frameInfo:
+ maxAlignment: 1
+ hasOpaqueSPAdjustment: true
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ successors: %bb.1(0x30000000), %bb.2(0x50000000)
+ liveins: $r2d, $r3d
+
+ %3:gr64bit = COPY $r3d
+ %2:addr64bit = COPY $r2d
+ %6:gr64bit = LGHI 0
+ CGHI %3, 0, implicit-def $cc
+ %8:gr64bit = LGHI 0
+ BRC 14, 6, %bb.2, implicit killed $cc
+ J %bb.1
+
+ bb.1:
+ %8:gr64bit = LG %2, 0, $noreg :: (load 8 from %ir.src)
+ INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
+
+ bb.2:
+ INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
+ CLGFI %8, 2, implicit-def $cc
+ %6:gr64bit = LOCGHI %6, 1, 14, 6, implicit killed $cc
+ %7:gr64bit = NGRK %3, %6, implicit-def dead $cc
+ $r2d = COPY %7
+ Return implicit $r2d
+
+...
+
+
+# 17-bit immediate can not be folded
+
+# CHECK-LABEL: fun2:
+# CHECK: mvhi 164(%r15), 0 # 4-byte Folded Spill
+# CHECK: mvc 164(4,%r15), 0(%r2) # 4-byte Folded Spill
+# CHECK-LABEL: .LBB2_2:
+# CHECK: l %r0, 164(%r15) # 4-byte Folded Reload
+# CHECK: clfi %r0, 65536
+---
+name: fun2
+alignment: 16
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: grx32bit }
+ - { id: 1, class: grx32bit }
+ - { id: 2, class: addr64bit }
+ - { id: 3, class: gr32bit }
+ - { id: 4, class: grx32bit }
+ - { id: 5, class: grx32bit }
+ - { id: 6, class: gr32bit }
+ - { id: 7, class: gr32bit }
+ - { id: 8, class: grx32bit }
+liveins:
+ - { reg: '$r2d', virtual-reg: '%2' }
+ - { reg: '$r3l', virtual-reg: '%3' }
+frameInfo:
+ maxAlignment: 1
+ hasOpaqueSPAdjustment: true
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ successors: %bb.1(0x30000000), %bb.2(0x50000000)
+ liveins: $r2d, $r3l
+
+ %3:gr32bit = COPY $r3l
+ %2:addr64bit = COPY $r2d
+ %6:gr32bit = LHIMux 0
+ CHIMux %3, 0, implicit-def $cc
+ %8:grx32bit = LHIMux 0
+ BRC 14, 6, %bb.2, implicit killed $cc
+ J %bb.1
+
+ bb.1:
+ %8:grx32bit = LMux %2, 0, $noreg :: (load 4 from %ir.src)
+ INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
+
+ bb.2:
+ INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
+ CLFIMux %8, 65536, implicit-def $cc
+ %6:gr32bit = LOCHIMux %6, 1, 14, 6, implicit killed $cc
+ %7:gr32bit = NRK %3, %6, implicit-def dead $cc
+ $r2l = COPY %7
+ Return implicit $r2l
+
+...
+
+
+# 17-bit immediate can not be folded
+
+# CHECK-LABEL: fun3:
+# CHECK: mvghi 168(%r15), 0 # 8-byte Folded Spill
+# CHECK: mvc 168(8,%r15), 0(%r2) # 8-byte Folded Spill
+# CHECK-LABEL: .LBB3_2:
+# CHECK: lg %r0, 168(%r15) # 8-byte Folded Reload
+# CHECK: clgfi %r0, 65536
+---
+name: fun3
+alignment: 16
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gr64bit }
+ - { id: 1, class: gr64bit }
+ - { id: 2, class: addr64bit }
+ - { id: 3, class: gr64bit }
+ - { id: 4, class: gr64bit }
+ - { id: 5, class: gr64bit }
+ - { id: 6, class: gr64bit }
+ - { id: 7, class: gr64bit }
+ - { id: 8, class: gr64bit }
+liveins:
+ - { reg: '$r2d', virtual-reg: '%2' }
+ - { reg: '$r3d', virtual-reg: '%3' }
+frameInfo:
+ maxAlignment: 1
+ hasOpaqueSPAdjustment: true
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ successors: %bb.1(0x30000000), %bb.2(0x50000000)
+ liveins: $r2d, $r3d
+
+ %3:gr64bit = COPY $r3d
+ %2:addr64bit = COPY $r2d
+ %6:gr64bit = LGHI 0
+ CGHI %3, 0, implicit-def $cc
+ %8:gr64bit = LGHI 0
+ BRC 14, 6, %bb.2, implicit killed $cc
+ J %bb.1
+
+ bb.1:
+ %8:gr64bit = LG %2, 0, $noreg :: (load 8 from %ir.src)
+ INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
+
+ bb.2:
+ INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
+ CLGFI %8, 65536, implicit-def $cc
+ %6:gr64bit = LOCGHI %6, 1, 14, 6, implicit killed $cc
+ %7:gr64bit = NGRK %3, %6, implicit-def dead $cc
+ $r2d = COPY %7
+ Return implicit $r2d
+
+...
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