[PATCH] D76401: [PowerPC][AIX] ByVal formal argument support: single register.

Sean Fertile via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 24 11:49:15 PDT 2020


sfertile added inline comments.


================
Comment at: llvm/test/CodeGen/PowerPC/aix-cc-byval.ll:95
+; ASM64-NEXT:   blr
+
 %struct.S2 = type { [2 x i8] }
----------------
jasonliu wrote:
> Do we want to add in an 0-byte by-val test?
Yes, and adding it caught an assertion in the caller of `LowerFormalArguemnts` which I otherwise missed so thank you.


================
Comment at: llvm/test/CodeGen/PowerPC/aix-cc-byval.ll:86
+; 32BIT:         STW killed renamable $r3, 0, %fixed-stack.0 :: (store 4 into %fixed-stack.0, align 8)
+; 32BIT-NEXT:    renamable $r3 = LBZ 0,  %fixed-stack.0 :: (dereferenceable load 1
+; 32BIT-NEXT:    BLR
----------------
cebowleratibm wrote:
> missing ')'. Still passes but worth tidying.
It's missing ` from %ir.arrayidx1, align 8)` but I didn't think it was important to include in the test output so I truncated it to show only what I though was relevant: that the load is derefrencable. If you want I can add them all back though.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76401/new/

https://reviews.llvm.org/D76401





More information about the llvm-commits mailing list