[llvm] 0b458d4 - [ValueTracking] Add computeKnownBits DemandedElts support to ADD/SUB/MUL instructions (PR36319)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 19 05:41:43 PDT 2020
Author: Simon Pilgrim
Date: 2020-03-19T12:41:29Z
New Revision: 0b458d4dcad011470ce31c90b591a5ee72f56f07
URL: https://github.com/llvm/llvm-project/commit/0b458d4dcad011470ce31c90b591a5ee72f56f07
DIFF: https://github.com/llvm/llvm-project/commit/0b458d4dcad011470ce31c90b591a5ee72f56f07.diff
LOG: [ValueTracking] Add computeKnownBits DemandedElts support to ADD/SUB/MUL instructions (PR36319)
Added:
Modified:
llvm/lib/Analysis/ValueTracking.cpp
llvm/test/Transforms/InstSimplify/compare.ll
Removed:
################################################################################
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 56243c3f3723..7a7be5bd3cb3 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -356,7 +356,7 @@ unsigned llvm::ComputeNumSignBits(const Value *V, const DataLayout &DL,
}
static void computeKnownBitsAddSub(bool Add, const Value *Op0, const Value *Op1,
- bool NSW,
+ bool NSW, const APInt &DemandedElts,
KnownBits &KnownOut, KnownBits &Known2,
unsigned Depth, const Query &Q) {
unsigned BitWidth = KnownOut.getBitWidth();
@@ -364,18 +364,19 @@ static void computeKnownBitsAddSub(bool Add, const Value *Op0, const Value *Op1,
// If an initial sequence of bits in the result is not needed, the
// corresponding bits in the operands are not needed.
KnownBits LHSKnown(BitWidth);
- computeKnownBits(Op0, LHSKnown, Depth + 1, Q);
- computeKnownBits(Op1, Known2, Depth + 1, Q);
+ computeKnownBits(Op0, DemandedElts, LHSKnown, Depth + 1, Q);
+ computeKnownBits(Op1, DemandedElts, Known2, Depth + 1, Q);
KnownOut = KnownBits::computeForAddSub(Add, NSW, LHSKnown, Known2);
}
static void computeKnownBitsMul(const Value *Op0, const Value *Op1, bool NSW,
- KnownBits &Known, KnownBits &Known2,
- unsigned Depth, const Query &Q) {
+ const APInt &DemandedElts, KnownBits &Known,
+ KnownBits &Known2, unsigned Depth,
+ const Query &Q) {
unsigned BitWidth = Known.getBitWidth();
- computeKnownBits(Op1, Known, Depth + 1, Q);
- computeKnownBits(Op0, Known2, Depth + 1, Q);
+ computeKnownBits(Op1, DemandedElts, Known, Depth + 1, Q);
+ computeKnownBits(Op0, DemandedElts, Known2, Depth + 1, Q);
bool isKnownNegative = false;
bool isKnownNonNegative = false;
@@ -1149,8 +1150,8 @@ static void computeKnownBitsFromOperator(const Operator *I,
}
case Instruction::Mul: {
bool NSW = Q.IIQ.hasNoSignedWrap(cast<OverflowingBinaryOperator>(I));
- computeKnownBitsMul(I->getOperand(0), I->getOperand(1), NSW, Known,
- Known2, Depth, Q);
+ computeKnownBitsMul(I->getOperand(0), I->getOperand(1), NSW, DemandedElts,
+ Known, Known2, Depth, Q);
break;
}
case Instruction::UDiv: {
@@ -1336,13 +1337,13 @@ static void computeKnownBitsFromOperator(const Operator *I,
case Instruction::Sub: {
bool NSW = Q.IIQ.hasNoSignedWrap(cast<OverflowingBinaryOperator>(I));
computeKnownBitsAddSub(false, I->getOperand(0), I->getOperand(1), NSW,
- Known, Known2, Depth, Q);
+ DemandedElts, Known, Known2, Depth, Q);
break;
}
case Instruction::Add: {
bool NSW = Q.IIQ.hasNoSignedWrap(cast<OverflowingBinaryOperator>(I));
computeKnownBitsAddSub(true, I->getOperand(0), I->getOperand(1), NSW,
- Known, Known2, Depth, Q);
+ DemandedElts, Known, Known2, Depth, Q);
break;
}
case Instruction::SRem:
@@ -1786,19 +1787,19 @@ static void computeKnownBitsFromOperator(const Operator *I,
case Intrinsic::uadd_with_overflow:
case Intrinsic::sadd_with_overflow:
computeKnownBitsAddSub(true, II->getArgOperand(0),
- II->getArgOperand(1), false, Known, Known2,
- Depth, Q);
+ II->getArgOperand(1), false, DemandedElts,
+ Known, Known2, Depth, Q);
break;
case Intrinsic::usub_with_overflow:
case Intrinsic::ssub_with_overflow:
computeKnownBitsAddSub(false, II->getArgOperand(0),
- II->getArgOperand(1), false, Known, Known2,
- Depth, Q);
+ II->getArgOperand(1), false, DemandedElts,
+ Known, Known2, Depth, Q);
break;
case Intrinsic::umul_with_overflow:
case Intrinsic::smul_with_overflow:
computeKnownBitsMul(II->getArgOperand(0), II->getArgOperand(1), false,
- Known, Known2, Depth, Q);
+ DemandedElts, Known, Known2, Depth, Q);
break;
}
}
diff --git a/llvm/test/Transforms/InstSimplify/compare.ll b/llvm/test/Transforms/InstSimplify/compare.ll
index cd25ab9db28b..3f095cd34e3d 100644
--- a/llvm/test/Transforms/InstSimplify/compare.ll
+++ b/llvm/test/Transforms/InstSimplify/compare.ll
@@ -724,12 +724,7 @@ define i1 @srem3(i16 %X, i32 %Y) {
define i1 @srem3v(<2 x i16> %X, <2 x i32> %Y) {
; CHECK-LABEL: @srem3v(
-; CHECK-NEXT: [[A:%.*]] = zext <2 x i16> [[X:%.*]] to <2 x i32>
-; CHECK-NEXT: [[B:%.*]] = or <2 x i32> <i32 1, i32 -2147483648>, [[A]]
-; CHECK-NEXT: [[C:%.*]] = sub nsw <2 x i32> <i32 0, i32 1>, [[B]]
-; CHECK-NEXT: [[E:%.*]] = extractelement <2 x i32> [[C]], i32 1
-; CHECK-NEXT: [[F:%.*]] = icmp slt i32 [[E]], 0
-; CHECK-NEXT: ret i1 [[F]]
+; CHECK-NEXT: ret i1 false
;
%A = zext <2 x i16> %X to <2 x i32>
%B = or <2 x i32> <i32 1, i32 2147483648>, %A
@@ -838,11 +833,7 @@ define i1 @mul1(i32 %X) {
define i1 @mul1v(<2 x i32> %X) {
; CHECK-LABEL: @mul1v(
-; CHECK-NEXT: [[Y:%.*]] = or <2 x i32> [[X:%.*]], <i32 1, i32 0>
-; CHECK-NEXT: [[M:%.*]] = mul nuw <2 x i32> [[Y]], [[Y]]
-; CHECK-NEXT: [[E:%.*]] = extractelement <2 x i32> [[M]], i32 0
-; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[E]], 0
-; CHECK-NEXT: ret i1 [[C]]
+; CHECK-NEXT: ret i1 false
;
%Y = or <2 x i32> %X, <i32 1, i32 0>
%M = mul nuw <2 x i32> %Y, %Y
@@ -864,11 +855,7 @@ define i1 @mul2(i32 %X) {
define i1 @mul2v(<2 x i32> %X) {
; CHECK-LABEL: @mul2v(
-; CHECK-NEXT: [[Y:%.*]] = or <2 x i32> [[X:%.*]], <i32 0, i32 1>
-; CHECK-NEXT: [[M:%.*]] = mul nsw <2 x i32> [[Y]], [[Y]]
-; CHECK-NEXT: [[E:%.*]] = extractelement <2 x i32> [[M]], i32 1
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[E]], 0
-; CHECK-NEXT: ret i1 [[C]]
+; CHECK-NEXT: ret i1 true
;
%Y = or <2 x i32> %X, <i32 0, i32 1>
%M = mul nsw <2 x i32> %Y, %Y
@@ -1333,14 +1320,7 @@ define i1 @icmp_known_bits(i4 %x, i4 %y) {
define i1 @icmp_known_bits_vec(<2 x i4> %x, <2 x i4> %y) {
; CHECK-LABEL: @icmp_known_bits_vec(
-; CHECK-NEXT: [[AND1:%.*]] = and <2 x i4> [[Y:%.*]], <i4 -7, i4 -1>
-; CHECK-NEXT: [[AND2:%.*]] = and <2 x i4> [[X:%.*]], <i4 -7, i4 -1>
-; CHECK-NEXT: [[OR1:%.*]] = or <2 x i4> [[AND1]], <i4 2, i4 2>
-; CHECK-NEXT: [[OR2:%.*]] = or <2 x i4> [[AND2]], <i4 2, i4 2>
-; CHECK-NEXT: [[ADD:%.*]] = add <2 x i4> [[OR1]], [[OR2]]
-; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i4> [[ADD]], i32 0
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i4 [[EXT]], 0
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 false
;
%and1 = and <2 x i4> %y, <i4 -7, i4 -1>
%and2 = and <2 x i4> %x, <i4 -7, i4 -1>
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