[PATCH] D75388: Expand interleaved memory access pass to identify certain shuffle_vector and transform it into target specific intrinsics.

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

I'm still not convinced that this shouldn't be done in ISel. There's nothing cross-block going on, so this is what ISel is designed for. It might make sense not to think of this as trying to convert vector_shuffle to something else, but instead trying to convert what vector_shuffle has turned into into something more optimal. In that one case I looked at, there was something like a (v4i32 (ext (v2i32 (buildvector (v4i32,..))). We get this way because a v2i16 was legalised to a v2i32, but everything around it was a v4i32. Can we "flatten" the ext into a single BUILDVECTOR? I have not had time to see if that is or isn't possible, but it sounds more sensible than very special case pre-isel legalisation for certain shuffle_vector's.

Also, as I said before:

- This should be 2 separate patches.
- They both need (lots of) tests. :)


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  https://reviews.llvm.org/D75388/new/

https://reviews.llvm.org/D75388