[PATCH] D75729: [RISCV] Select +0.0 immediate using fmv.{w,d}.x / fcvt.d.w

[Luís Marques via Phabricator via llvm-commits]

luismarques accepted this revision.
luismarques added a comment.
This revision is now accepted and ready to land.

LGTM!



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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoF.td:397-413
 let Predicates = [HasStdExtF, IsRV32] in {
+
 // FP->[u]int. Round-to-zero must be used
 def : Pat<(fp_to_sint FPR32:$rs1), (FCVT_W_S $rs1, 0b001)>;
 def : Pat<(fp_to_uint FPR32:$rs1), (FCVT_WU_S $rs1, 0b001)>;
 
 // [u]int->fp. Match GCC and default to using dynamic rounding mode.
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Make sure the whitespace new line introduced here is consistent with the rest of the file.


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