[PATCH] D76201: [TargetLowering] Only demand a rotation's modulo amount bits
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 15 12:51:23 PDT 2020
RKSimon marked 2 inline comments as done.
RKSimon added inline comments.
Herald added a subscriber: wuzish.
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Comment at: llvm/test/CodeGen/SystemZ/rot-01.ll:30
; CHECK-NEXT: br %r14
%mod = urem i64 %amt, 32
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@uweigand Should this be 32 or 64?
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Comment at: llvm/test/CodeGen/SystemZ/rot-02.ll:7
; Test that AND is not removed when some lower 6 bits are not set.
define i32 @f1(i32 %val, i32 %amt) {
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@uweigand This comment doesn't seem to match the test - any suggestions?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D76201/new/
https://reviews.llvm.org/D76201
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