[PATCH] D76139: [Target][ARM] Change VPTMaskValues to the correct encoding

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh created this revision.
Pierre-vh added reviewers: simon_tatham, dmgreen, samparker.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls.
Herald added a project: LLVM.
Pierre-vh added a child revision: D75993: [Target][ARM] Improvements to the VPT Block Insertion Pass.

VPTMaskValue was using the "instruction" encoding to represent the masks (= the same encoding as the one used by the instructions in an object file), but it is only used to build MCOperands, so it should use the MCOperand encoding of the masks, which is //slightly// different.

Note that this has gone unnoticed for a long time because the encodings are identical for most masks (T, TT, TTT, etc.). We only noticed this (with the help of @simon_tatham 
) while we were working on upgrading the MVE VPT Block insertion pass because incorrect assembly was generated for things like TTET.

(Adding @samparker to the list of reviewers as he added this enum I believe)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D76139

Files:
  llvm/lib/Target/ARM/Utils/ARMBaseInfo.h


Index: llvm/lib/Target/ARM/Utils/ARMBaseInfo.h
===================================================================
--- llvm/lib/Target/ARM/Utils/ARMBaseInfo.h
+++ llvm/lib/Target/ARM/Utils/ARMBaseInfo.h
@@ -92,24 +92,32 @@
     Else
   };
 
+  /// Mask values for VPT Blocks, to be used by MCOperands.
+  /// Note that this is different from the "real" encoding used by the
+  /// instructions. In this encoding, the lowest set bit indicates the end of
+  /// the encoding, and above that, "1" indicates an else, while "0" indicates
+  /// a then.
+  ///   Tx = x100
+  ///   Txy = xy10
+  ///   Txyz = xyz1
   enum VPTMaskValue {
-    T     =  8, // 0b1000
-    TT    =  4, // 0b0100
-    TE    = 12, // 0b1100
-    TTT   =  2, // 0b0010
-    TTE   =  6, // 0b0110
-    TEE   = 10, // 0b1010
-    TET   = 14, // 0b1110
-    TTTT  =  1, // 0b0001
-    TTTE  =  3, // 0b0011
-    TTEE  =  5, // 0b0101
-    TTET  =  7, // 0b0111
-    TEEE  =  9, // 0b1001
-    TEET  = 11, // 0b1011
-    TETT  = 13, // 0b1101
-    TETE  = 15  // 0b1111
+    T = 0b1000,
+    TT = 0b0100,
+    TE = 0b1100,
+    TTT = 0b0010,
+    TTE = 0b0110,
+    TEE = 0b1110,
+    TET = 0b1010,
+    TTTT = 0b0001,
+    TTTE = 0b0011,
+    TTEE = 0b0111,
+    TTET = 0b0101,
+    TEEE = 0b1111,
+    TEET = 0b1101,
+    TETT = 0b1001,
+    TETE = 0b1011
   };
-}
+} // namespace ARMVCC
 
 inline static const char *ARMVPTPredToString(ARMVCC::VPTCodes CC) {
   switch (CC) {


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