[PATCH] D75988: [AArch64][SVE] Add support for spilling/filling ZPR2/3/4

[Cameron McInally via Phabricator via llvm-commits]

cameron.mcinally added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:3056
+    StackID = TargetStackID::SVEVector;
   }
   assert(Opc && "Unknown register class");
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Nit: Should these be the None/default case of the switch above?

Seems wasteful to keep searching if we've already found our opcode in the switch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75988/new/

https://reviews.llvm.org/D75988