[PATCH] D75988: [AArch64][SVE] Add support for spilling/filling ZPR2/3/4

[Cullen Rhodes via Phabricator via llvm-commits]

c-rhodes created this revision.
c-rhodes added reviewers: sdesmalen, efriedma, rengolin, cameron.mcinally.
Herald added subscribers: danielkiss, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett, qcolombet.
Herald added a project: LLVM.

This patch enables the register allocator to spill/fill lists of 2, 3
and 4 SVE vectors registers to/from the stack. This is implemented with
pseudo instructions that get expanded to individual LDR_ZXI/STR_ZXI
instructions in AArch64ExpandPseudoInsts.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75988

Files:
  llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/spillfill-sve.mir

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