[PATCH] D75601: [AArch64][SVE] Add intrinsics for non-temporal scatters/gathers
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 5 09:18:16 PST 2020
efriedma added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-gather-loads-64bit-scaled-offset.ll:12
+; CHECK-LABEL: gldnt1h_index
+; CHECK: mul z0.d, z0.d, #2
+; CHECK-NEXT: ldnt1h { z0.d }, p0/z, [z0.d, x0]
----------------
andwar wrote:
> efriedma wrote:
> > "mul"? Can we make a shift instead?
> Sadly there are no patterns for `lsl` yet, so I'd have to add a call to `@llvm.aarch64.sve.lsl` for this to wok. It's an option, but I'd prefer to leave a TODO instead (e.g. `// TODO Replace MUL with SHL once patterns for lsl are added)`.
The lsl patterns are pretty simple; see https://reviews.llvm.org/D73602 . But sure, we can leave that for later.
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https://reviews.llvm.org/D75601/new/
https://reviews.llvm.org/D75601
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