[PATCH] D75601: [AArch64][SVE] Add intrinsics for non-temporal scatters/gathers
Andrzej Warzynski via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 5 06:01:53 PST 2020
andwar marked an inline comment as done.
andwar added a comment.
In D75601#1906202 <https://reviews.llvm.org/D75601#1906202>, @efriedma wrote:
> If I'm following correctly, you don't actually create any SSTNT1_INDEX nodes? You're just using it as a placeholder in the call to performScatterStoreCombine? I guess that's not a big deal.
Correct. Same for `LDNT1_INDEX`. I'm only using these nodes to uniquely identify scatters/gathers that:
- are non-temporal
- use the "scalar + vector of indices" addressing mode.
It's not great, but I think it's the least intrusive way of identifying these cases.
================
Comment at: llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-gather-loads-64bit-scaled-offset.ll:12
+; CHECK-LABEL: gldnt1h_index
+; CHECK: mul z0.d, z0.d, #2
+; CHECK-NEXT: ldnt1h { z0.d }, p0/z, [z0.d, x0]
----------------
efriedma wrote:
> "mul"? Can we make a shift instead?
Sadly there are no patterns for `lsl` yet, so I'd have to add a call to `@llvm.aarch64.sve.lsl` for this to wok. It's an option, but I'd prefer to leave a TODO instead (e.g. `// TODO Replace MUL with SHL once patterns for lsl are added)`.
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https://reviews.llvm.org/D75601/new/
https://reviews.llvm.org/D75601
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