[PATCH] D75610: [mlir][ods] Improve integer signedness modelling
Mahesh Ravishankar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 4 10:39:16 PST 2020
mravishankar resigned from this revision.
mravishankar added a comment.
Just a minor comment on the SPIR-V side.
================
Comment at: mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td:66
let predicate = And<[
- IntegerAttrBase<I32, "">.predicate,
+ I32Attr.predicate,
SPV_IsKnownEnumCaseFor<name>,
----------------
Do we want to used unsigned attribute here, i.e UI32Attr.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D75610/new/
https://reviews.llvm.org/D75610
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