[PATCH] D75610: [mlir][ods] Improve integer signedness modelling

[River Riddle via Phabricator via llvm-commits]

rriddle accepted this revision.
rriddle marked an inline comment as done.
rriddle added a comment.
This revision is now accepted and ready to land.

Thanks Lei!



================
Comment at: mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td:569
+                         SingleBlockImplicitTerminator<"ReturnOp">, Symbol]> {
+  let arguments = (ins
+    TypeAttr:$type,
----------------
IMO: we should cleanup all of these definitions to not use `Arguments`. It is much much cleaner.


================
Comment at: mlir/include/mlir/IR/OpBase.td:381
 
+// Any signed integer type irrespective of its width.
+def AnySignedInteger : Type<
----------------
nit: Move the signed before the unsigned.


================
Comment at: mlir/include/mlir/IR/OpBase.td:859
 
-class PositiveIntAttrBase<I attrValType, string descr> :
+// Base class for signed integer attributes of fixed width.
+class SignedIntegerAttrBase<SI attrValType, string descr> :
----------------
nit: Move the signed before the unsigned.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D75610/new/

https://reviews.llvm.org/D75610