[PATCH] D75421: [AArch64][GlobalISel] Avoid copies to target register bank for subregister copies

[Raul Tambre via Phabricator via llvm-commits]

tambre created this revision.
tambre added a reviewer: t.p.northover.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls, rovka.
Herald added a project: LLVM.
tambre retitled this revision from "[AArch64][GlobalISel] Avoid unnecessary copies to target register bank for subregister copies" to "[AArch64][GlobalISel] Avoid copies to target register bank for subregister copies".
tambre edited the summary of this revision.

Previously for any copy from a register bigger than the destination:

1. Copied to a same-sized register in the destination register bank.
2. Subregister of that to the destination.

This fails for copies from 128-bit FPRs to GPRs because the GPR register bank can't accomodate 128-bit values.

Instead of special-casing such copies to perform the truncation beforehand in
the source register bank, generalize this behaviour:
a) Perform a subregister copy straight from source register whenever possible. This results in shorter MIR and fixes the above problem.
b) Perform a full copy to target bank and then do a subregister copy only if source bank can't support target's size. E.g. GPR to 8-bit FPR copy.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75421

Files:
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
  llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-and-tbz-tbnz.mir
  llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
  llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-shift-tbz-tbnz.mir
  llvm/test/CodeGen/AArch64/GlobalISel/subreg-copy.mir

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