[PATCH] D74937: [AMDGPU] Implement copyPhysReg for 16 bit subregs
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 28 12:12:01 PST 2020
rampitec added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/lo16-hi16-physreg-copy.mir:105
+ S_ENDPGM 0
+...
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arsenm wrote:
> Needs some tests with both halves in the same 32-bit register
>
> Also need some with kill and undef flag handling
Good catch about the same VGPR. I will need some special handling for it.
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https://reviews.llvm.org/D74937/new/
https://reviews.llvm.org/D74937
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