[llvm] addcbc4 - [AMDGPU] Update a comment missed in 74e2974ac6a

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2020-02-28T13:35:55Z
New Revision: addcbc401cf21d92ad3819971d832c73e70ba529

URL: https://github.com/llvm/llvm-project/commit/addcbc401cf21d92ad3819971d832c73e70ba529
DIFF: https://github.com/llvm/llvm-project/commit/addcbc401cf21d92ad3819971d832c73e70ba529.diff

LOG: [AMDGPU] Update a comment missed in 74e2974ac6a

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/VOP3Instructions.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
index f327d28670d2..d3401147d9d5 100644
--- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
@@ -425,7 +425,7 @@ let isCommutable = 1 in {
 let SchedRW = [WriteQuarterRate32, WriteSALU] in {
 def V_MAD_U64_U32 : VOP3Inst <"v_mad_u64_u32", VOP3b_I64_I1_I32_I32_I64>;
 def V_MAD_I64_I32 : VOP3Inst <"v_mad_i64_i32", VOP3b_I64_I1_I32_I32_I64>;
-} // End SchedRW = [WriteDouble, WriteSALU]
+} // End SchedRW = [WriteQuarterRate32, WriteSALU]
 } // End isCommutable = 1
 
 } // End SubtargetPredicate = isGFX7Plus