[PATCH] D75086: [AArch64][GlobalISel] Fixup <32b heterogeneous regbanks of G_PHIs just before selection.
Quentin Colombet via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 26 10:25:37 PST 2020
qcolombet added a comment.
Thanks for the clarification Amara.
Now a follow-up question:
> If this happens, the PHI operand with a GPR RegBank gets the gpr32 regclass assigned to it (we don't have anything smaller to represent types like s16 on GPR on AArch64).
How do you represent s16 values into gpr32?
I would have expected that if you have to widen the size when assigning the actual register class, then legalization should have actually widen the value. Otherwise, that means we have to manually deal with "dangling" bits everywhere else.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D75086/new/
https://reviews.llvm.org/D75086
More information about the llvm-commits
mailing list