[PATCH] D74471: [AArch64][SVE] Add predicate reinterpret intrinsics

[Cullen Rhodes via Phabricator via llvm-commits]

c-rhodes marked an inline comment as done.
c-rhodes added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7481
+      if (CSplatVal->isNullValue())
+        return SDValue(DAG.getMachineNode(AArch64::PFALSE, dl, VT), 0);
     // The general case of i1.  There isn't any natural way to do this,
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efriedma wrote:
> We should not be calling getMachineNode before Select().  If we need a new AArch64ISD opcode, please add one.
> 
> I'm not sure how this is relevant to the rest of the patch, in any case.
It was necessary for how the test was written downstream with `zeroinitializer` but you're right it's not really relevant. I've removed this.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74471/new/

https://reviews.llvm.org/D74471